A field-effect-transistor (FET) comprises a gate oxide, which is an insulating layer between a gate and a channel region of the transistor. When used in digital logic applications, FETs are often fabricated with what is referred to as a core gate oxide, which, in recent integrated circuit (IC) fabrication technologies, is typically a very thin gate oxide, such as, for example, about 2 nanometers (nm) or less. Core or thin gate oxide transistors are typically capable of supporting, without damage, only relatively low voltages (e.g., core level voltages), for example, about 1.2 volts (V) or less. A transistor comprising a core gate oxide is often referred to as a core transistor and supports core voltage levels.
In certain applications, including, for example, some input/output (I/O) buffer and analog applications, transistors capable of supporting, without damage, higher voltages (e.g., I/O level voltages), for example, about 1.98, 3.63 or 5.5 volts, are required. A transistor capable of supporting these relatively higher I/O level voltages is typically fabricated having what is typically referred to as a thick gate oxide which, in recent technologies, may include devices having gate oxide thicknesses of, for example, about 2.3 nm or greater. A transistor comprising a thick gate oxide is often referred to as a thick oxide transistor and supports higher I/O voltage levels. Many IC fabrication processes provide both core transistors and thick oxide transistors.
In certain applications, such as, for example, in a hot carrier injection (HCI) application, in order to somewhat increase the voltage that a transistor device can withstand without experiencing long-term damage, a channel length of the device can be increased. However, this can significantly increase the area required by a circuit employing such transistors, which is undesirable. It is also known to use a triple gate oxide process in IC fabrication for providing transistors having even thicker gate oxides, and therefore supporting higher voltage levels without sustaining damage. Such transistors may be used in high-voltage applications, including, for example, electrostatic discharge (ESD) protection. However, in standard IC fabrication processes, such as, for example, 40-nm technology, one is restricted to using only a single thick oxide transistor type, primarily because adding an extra thick gate oxide to the process inherently lowers the yield of the fabricated devices and adds unnecessary cost and complexity. Additionally, as gate oxide increases, gate capacitance increases accordingly, thereby degrading high-frequency performance of the device. This forces a circuit designer to make a decision as to which of the available thick gate oxides will be used in a system-on-a-chip (SoC) design.